1. Field of the Invention
This invention relates generally to imaging systems, and more particularly, to pixel array column buffers.
2. Description of the Related Art
Imaging systems typically consist of a row and column array of pixels, the outputs of which are processed to provide an output signal which varies with the light impinging on the array. Each pixel includes a sensor such as a photodiode or charge-coupled device (CCD); if the pixel is “active” it also includes a means for amplifying the sensor's output.
The resolution of an imaging system is determined by the number of pixels located within a given area. To accommodate the desire for ever-higher resolution, pixels are made smaller and smaller. However, this trend towards smaller pixels has led to problems—especially for “active” pixels—which require processing circuitry at each pixel location. For example, some small pixels have a “pitch”—i.e., the width of the pixel—as small as 2 μm. The sensors used for these narrow pixels necessarily produce a very small output signal, which requires considerable processing if noise is to be kept low.
Many techniques have been developed to reduce pixel noise. One method involves correlated-double-sampling (CDS) circuitry, which is described, for example, in “CMOS Active Pixel Image Sensors for Highly Integrated Imaging Systems”, S. Mendis et al., IEEE Journal of Solid-state Circuits, Vol. 32, No. 2, February 1997, pp. 187-197. Here, active pixels are periodically reset to a known voltage (Vpixrst). At a predetermined “clamp” time, a CDS circuit stores the difference between a CDS clamp level (Vcds) and the signal level (Vsig) at clamp time (Vcds−Vsig, where Vsig is the output from the pixel at clamp time) on a Ccds capacitor, and adds this voltage to the pixel reset level (Vpixrst) at pixel reset time to produce (Vcds−Vsig)+Vpixrst at the CDS output. This is the difference between the signal and reset level (Vpixrst−Vsig), plus a constant offset (Vcds). This difference voltage between reset and signal levels is used to suppress correlated noise sources and thereby produce a net output signal. The output signal is delivered to gain circuitry which increases the signal's level, so as to raise the noise floor of the signal delivered to the system's output drivers.
However, both the CDS and gain circuitry require a considerable amount of area. Since the available area is typically limited by the pixel pitch, arrays with small pixels may be unable to accommodate these circuits. This is because some circuitry must remain in the column pitch since it cannot be shared from column to column, such as sample/hold and CDS circuits and gain capacitors.